Terafab AI
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Terafab AI

Custom silicon, fabricated for the compute the group needs.

1.2M+
Wafer capacity (annualized)
3nm
Process node
2M+
Chips shipped (2026)
400+
Employees
Overview

Terafab AI designs and fabricates custom AI accelerator chips purpose-built for training and inference workloads across the group, reducing dependence on third-party silicon and giving xAI, Tesla, and Optimus a hardware roadmap tuned to their own model architectures rather than general-purpose GPUs.

Snapshot
Valuation
-
Change
+8.9%
Founded
2025
Headquarters
Austin, TX
Employees
400+
The Full Story

About Terafab AI

Terafab AI designs and fabricates custom AI accelerator chips purpose-built for the training and inference workloads that run across the group, reducing dependence on general-purpose third-party GPUs. TF-1, the first-generation accelerator, is fabricated on a 3nm process and tuned specifically for the model architectures xAI trains, trading general-purpose flexibility for efficiency on known workloads.

TF-1 units are already deployed inside Colossus alongside third-party accelerators, with the group's compute roadmap shifting a growing share of capacity to Terafab silicon with each successive generation.

Mission

Design and fabricate the silicon the group's AI systems run on.

Timeline

How it got here

  1. 2025

    Founded

    Started to give the group's AI systems a hardware roadmap tuned to its own model architectures rather than general-purpose GPUs.

  2. 2025

    First tape-out

    The initial TF-1 chip design was finalized and sent to fabrication.

  3. 2026

    TF-1 enters production

    First-generation accelerators began shipping at production volume.

  4. 2026

    Deployed inside Colossus

    TF-1 units began running Grok training and inference workloads alongside third-party accelerators in xAI's Memphis cluster.

What defines it

Core pillars

Purpose-built architecture

TF-1's design is tuned specifically for the model shapes xAI trains, rather than aiming for general-purpose flexibility.

Vertical integration with xAI

Chip design and the training stack it runs are developed with direct visibility into each other's roadmap.

Efficiency-first design

Lower cost and power per token is the core design goal, not raw peak throughput on paper.

In-house fabrication partnership

Design work happens in-house, fabricated through a leading-edge foundry partner rather than an off-the-shelf chip vendor.

Where it happens

Facilities

Design Headquarters
Austin, TX

Design Headquarters

Chip architecture, design, and verification work.

Fabrication Partner Site
Undisclosed, leading-edge foundry

Fabrication Partner Site

3nm-process fabrication carried out through a leading-edge external foundry partnership.

By the numbers

Scale

1.2M+
Wafer capacity (annualized)
3nm
Process node
2M+
Chips shipped (2026)
2 PFLOPs
Peak compute (FP8)
Safety

How it's kept safe

  • Fabrication and supply chain partners are vetted under the group's standard security and quality review process.
  • Each production batch goes through hardware validation testing before deployment into live training infrastructure.
Sustainability

Environmental note

TF-1's efficiency-first design targets lower cost and power per token relative to general-purpose GPUs, directly reducing the energy draw of every training run it's used in.

Questions

Frequently asked

What is TF-1?+

Terafab AI's first-generation AI accelerator chip, fabricated on a 3nm process and tuned specifically for training and inference workloads like Grok.

Can enterprises buy TF-1?+

Yes - it's listed at an enterprise quote price per unit; see the product listing below to start a quote.

How does it compare to general-purpose GPUs?+

TF-1 trades general-purpose flexibility for efficiency on the specific model architectures it was designed around, aiming for a lower cost and power draw per token on those workloads.

Is TF-1 used outside the xAI group?+

Current production deploys primarily inside Colossus; enterprise sales outside the group are handled through a separate quote process.